M48Z512BV Datasheet, PDF (1/20 Pages) STMicroelectronics – 3.3 V, 4 Mbit (512 K x 8 bit) ZEROPOWER SRAM

M48Z512BV
3.3 V, 4 Mbit (512 K x 8 bit) ZEROPOWER^® SRAM
Features
■ Integrated, ultra-low power SRAM, power-fail
control circuit, and battery
■ Conventional SRAM operation; unlimited
WRITE cycles
■ 10 years of data retention in the absence of
power
■ Automatic power-fail chip deselect and WRITE
protection
■ 3.0 to 3.6 V operation
– 2.9 V power-fail deselect
■ Pin and function compatible with JEDEC
standard 512 K x 8 SRAMs
■ PMDIP32 is an ECOPACK^® package
■ For 5 V applications, refer to the M48Z512A
32
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PMDIP32 (PM) module
Description
The M48Z512BV ZEROPOWER^® RAM is a non-
volatile, 4,194,304-bit static RAM organized as
524,288 words by 8 bits. The devices combine an
internal lithium battery, a CMOS SRAM and a
control circuit in a plastic, 32-pin DIP module.
August 2008
Rev 1
1/20
www.st.com
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