M48Z30 Datasheet, PDF (1/12 Pages) STMicroelectronics – CMOS 32K x 8 ZEROPOWER SRAM

M48Z30
M48Z30Y
CMOS 32K x 8 ZEROPOWER SRAM
INTEGRATED LOW POWER SRAM,
POWER-FAIL CONTROL CIRCUIT and
BATTERY
CONVENTIONAL SRAM OPERATION;
UNLIMITED WRITE CYCLES
10 YEARS of DATA RETENTION in the
ABSENCE of POWER
PIN and FUNCTION COMPATIBLE with
JEDEC STANDARD 32K x 8 SRAMs
AUTOMATIC POWER-FAIL CHIP DESELECT
and WRITE PROTECTION
CHOICE of TWO WRITE PROTECT
VOLTAGES:
– M48Z30: 4.5V ≤ V_PFD ≤ 4.75V
– M48Z30Y: 4.2V ≤ V_PFD ≤ 4.50V
BATTERY INTERNALLY ISOLATED UNTIL
POWER IS APPLIED
28
1
PMDIP28 (PM)
Module
Figure 1. Logic Diagram
DESCRIPTION
The M48Z30/30Y 32K x 8 ZEROPOWER^® RAM is
a non-volatile 262,144 bit Static RAM organized as
32,768 words by 8 bits. The device combines an
internal lithium battery and a full CMOS SRAM in a
plastic 28 pin DIP Module. The ZEROPOWER
Table 1. Signal Names
A0 - A14
Address Inputs
DQ0 - DQ7
Data Inputs / Outputs
E
Chip Enable
G
Output Enable
W
Write Enable
V_CC
Supply Voltage
VSS
Ground
July 1994
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