M48Z2M1Y_10 Datasheet, PDF (1/20 Pages) STMicroelectronics – 5 V or 3.3 V, 16 Mbit (2 Mb x 8) ZEROPOWER® SRAM

M48Z2M1Y
M48Z2M1V
5 V or 3.3 V, 16 Mbit (2 Mb x 8) ZEROPOWER^® SRAM
Features
■ Integrated, ultra low power SRAM, power-fail
control circuit, and batteries
■ Conventional SRAM operation; unlimited
WRITE cycles
■ 10 years of data retention in the absence of
power
■ Automatic power-fail chip deselect and WRITE
protection
■ WRITE protect voltages
(V_PFD = Power-fail deselect voltage):
– M48Z2M1Y: V_CC = 4.5 to 5.5 V
4.2 V ≤ V_PFD ≤ 4.5 V
– M48Z2M1V: V_CC = 3.0 to 3.6 V
2.8 V ≤ V_PFD ≤ 3.0 V
M48Z2M1V not recommended for new
design. Contact ST sales office for
availability.
■ Batteries are internally isolated until power is
applied
■ Pin and function compatible with JEDEC
standard 2 Mb x 8 SRAMs
■ RoHS compliant
– Lead-free second level interconnect
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PLDIP36 module (PL)
August 2010
Doc ID 5135 Rev 5
1/20
www.st.com
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