M48T59_08 Datasheet, PDF (1/32 Pages) STMicroelectronics – 5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM

M48T59
M48T59Y, M48T59V
5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER^® SRAM
Not For New Design
Features
■ Integrated ultra low power SRAM, real-time
clock, power-fail control circuit, and battery
■ Frequency test output for real-time clock
software calibration
■ Automatic power-fail chip deselect and WRITE
protection
28
■ WRITE protect voltages
(V_PFD = Power-fail deselect voltage):
t(s) – M48T59: VCC = 4.75 to 5.5 V
4.5 V ≤ V_PFD ≤ 4.75 V
uc ^{– M48T59Y: V}CC ^{= 4.5 to 5.5 V}
d _{4.2 V ≤ VPFD ≤ 4.5 V}
ro – M48T59V^(a): V_CC = 3.0 to 3.6 V
P _{2.7 V ≤ VPFD ≤ 3.0 V}
te ■ Self-contained battery and crystal in the
le ^{CAPHAT™ DIP package}
o _{■ Packaging includes a 28-lead SOIC and}
bs SNAPHAT^® top (to be ordered separately)
O _{■ SOIC package provides direct connection for a}
- _{SNAPHAT top which contains the battery and}
t(s) ^crystal
■ Microprocessor power-on reset (valid even
uc during battery back-up mode)
rod ^{■ Programmable alarm output active in the}
battery back-up mode
P _{■ Battery low flag}
lete ^{■ RoHS compliant}
Obso^{– Lead-free second level interconnect}
1
PCDIP28 (PC)
battery/crystal
CAPHAT
SNAPHAT (SH)
battery/crystal
28
1
SOH28 (MH)
a. Contact local ST sales office for availability of 3.3 V
version.
April 2008
Rev 7
This is information on a product still in production but not recommended for new designs.
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www.st.com
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