M48T59 Datasheet, PDF (1/21 Pages) STMicroelectronics – 64 Kbit 8Kb x8 TIMEKEEPER SRAM

M48T59
M48T59Y/M48T59V
64 Kbit (8Kb x8) TIMEKEEPER^® SRAM
PRELIMINARY DATA
s INTEGRATED ULTRA LOW POWER SRAM,
REAL TIME CLOCK, POWER-FAIL CONTROL
CIRCUIT and BATTERY
s FREQUENCY TEST OUTPUT for REAL TIME
CLOCK SOFTWARE CALIBRATION
s AUTOMATIC POWER-FAIL CHIP DESELECT
and WRITE PROTECTION
s WRITE PROTECT VOLTAGES
(V_PFD = Power-fail Deselect Voltage):
– M48T59: 4.5V ≤ V_PFD ≤ 4.75V
– M48T59Y: 4.2V ≤ V_PFD ≤ 4.5V
– M48T59V: 2.7V ≤ V_PFD ≤ 3.0V
s SELF-CONTAINED BATTERY and CRYSTAL
in the CAPHAT DIP PACKAGE
s PACKAGING INCLUDES a 28-LEAD SOIC and
SNAPHAT^® TOP
(to be Ordered Separately)
s SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP which
CONTAINS the BATTERY and CRYSTAL
s MICROPROCESSOR POWER-ON RESET
(Valid even during battery back-up mode)
s PROGRAMMABLE ALARM OUTPUT ACTIVE
in the BATTERY BACK-UP MODE
s BATTERY LOW FLAG
Table 1. Signal Names
A0-A12
Address Inputs
DQ0-DQ7
Data Inputs / Outputs
IRQ/FT
Interrupt / Frequency Test
Output (Open Drain)
RST
Power Fail Reset Output
(Open Drain)
E
Chip Enable
G
Output Enable
W
Write Enable
V_CC
Supply Voltage
V_SS
Ground
SNAPHAT (SH)
Battery/Crytstal
28
28
1
SOH28 (MH)
1
PCDIP28 (PC)
Battery/Crystal
CAPHAT
Figure 1. Logic Diagram
VCC
13
A0-A12
8
DQ0-DQ7
W
M48T59
M48T59Y
E
M48T59V
IRQ/FT
G
RST
VSS
AI01380E
October 1999
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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