M48T129Y Datasheet, PDF (1/22 Pages) STMicroelectronics – 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM

M48T129Y
M48T129V
3.3V-5V 1 Mbit (128Kb x8) TIMEKEEPER^® SRAM
s INTEGRATED ULTRA LOW POWER SRAM,
REAL TIME CLOCK, POWER-FAIL CONTROL
CIRCUIT, BATTERY AND CRYSTAL
s YEAR 2000 COMPLIANT
s BCD CODED CENTURY, YEAR, MONTH,
DAY, DATE, HOURS, MINUTES, and
SECONDS
s BATTERY LOW WARNING FLAG
s AUTOMATIC POWER-FAIL CHIP DESELECT
and WRITE PROTECTION
s TWO WRITE PROTECT VOLTAGES:
(V_PFD = Power-fail Deselect Voltage)
– M48T129Y: 4.2V ≤ V_PFD ≤ 4.5V
– M48T129V: 2.7V ≤ V_PFD ≤ 3.0V
s CONVENTIONAL SRAM OPERATION;
UNLIMITED WRITE CYCLES
s SOFTWARE CONTROLLED CLOCK
CALIBRATION for HIGH ACCURACY
APPLICATIONS
s 10 YEARS of DATA RETENTION and CLOCK
OPERATION in the ABSENCE of POWER
s SELF CONTAINED BATTERY and CRYSTAL
in DIP PACKAGE
s MICROPROCESSOR POWER-ON RESET
(Valid even during battery back-up mode)
s PROGRAMMABLE ALARM OUTPUT ACTIVE
in BATTERY BACK-UP MODE
s SURFACE MOUNT CHIP SET PACKAGING
INCLUDES a 44-PIN SOIC and a 32-LEAD
TSOP (SNAPHAT TOP TO BE ORDERED
SEPARATELY)
s SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP WHICH
CONTAINS the BATTERY and CRYSTAL
s SNAPHAT^® HOUSING (BATTERY/CRYSTAL)
IS REPLACEABLE
32
1
PMDIP32 (PM)
Module
SNAPHAT (SH)
Battery
TSOP32
(8 x 20mm)
SOH44
Surface Mount Chip Set Solution (CS)
Figure 1. Logic Diagram
VCC
17
A0-A16
W
E
G
M48T129Y
M48T129V
8
DQ0-DQ7
RST
IRQ/FT
VSS
AI02260
April 2000
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