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M36L0R7060T1 Datasheet, PDF (1/22 Pages) STMicroelectronics – 128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package | |||
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M36L0R7060T1
M36L0R7060B1
128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory
and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package
Features
â Multichip package
â 1 die of 128 Mbit (8 Mb x16, Multiple Bank,
Multilevel, Burst) Flash memory
â 1 die of 64 Mbit (4 Mb x16) Pseudo SRAM
â Supply voltage
â VDDF = VCCP = VDDQF = 1.7 to 1.95 V
â VPPF = 9 V for fast program
â Electronic signature
â Manufacturer Code: 20h
â Top Device Code
M36L0R7060T1: 88C4h
â Bottom Device Code
M36L0R7060B1: 88C5h
â Package
â ECOPACK®
Flash memory
â Synchronous / Asynchronous Read
â Synchronous Burst Read mode: 54 MHz,
66 MHz
â Random Access: 70 ns, 85 ns
â Synchronous Burst Read Suspend
â Programming time
â 2.5 µs typical word program time using
Buffer Enhanced Factory Program
command
â Memory organization
â Multiple Bank memory array: 8 Mbit banks
â Parameter Blocks (top or bottom location)
â Common Flash Interface (CFI)
â 100 000 program/erase cycles per block
â Dual operations
â program/erase in one Bank while read in
others
â No delay between read and write
operations
FBGA
TFBGA88 (ZAQ)
8 x 10 mm
â Security
â 64 bit unique device number
â 2112 bit user programmable OTP Cells
â Block locking
â All blocks locked at power-up
â Any combination of blocks can be locked
with zero latency
â WPF for Block Lock-Down
â Absolute Write Protection with VPPF = VSS
PSRAM
â Access time: 70 ns
â Asynchronous Page Read
â Page Size: 4, 8 or 16 words
â Subsequent read within page: 20 ns
â Low power features
â Automatic Temperature-compensated Self-
Refresh (TCR)
â Partial Array Self-Refresh (PASR)
â Deep Power-Down (DPD) mode
â Synchronous Burst Read/Write
May 2007
Rev 1
1/22
www.st.com
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