M29F100T Datasheet, PDF (1/30 Pages) STMicroelectronics – 1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory

M29F100T
M29F100B
1 Mbit (128Kb x8 or 64Kb x16, Boot Block)
Single Supply Flash Memory
5V ± 10% SUPPLY VOLTAGE for PROGRAM,
ERASE and READ OPERATIONS
FAST ACCESS TIME: 70ns
FAST PROGRAMMING TIME
– 10µs by Byte / 16µs by Word typical
PROGRAM/ERASE CONTROLLER (P/E.C.)
– Program Byte-by-Byte or Word-by-Word
– Status Register bits and Ready/Busy Output
MEMORY BLOCKS
– Boot Block (Top or Bottom location)
– Parameter and Main blocks
BLOCK, MULTI-BLOCK and CHIP ERASE
MULTI-BLOCK PROTECTION/TEMPORARY
UNPROTECTION MODES
ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
Erase Suspend
LOW POWER CONSUMPTION
– Stand-by and Automatic Stand-by
100,000 PROGRAM/ERASE CYCLES per
BLOCK
20 YEARS DATA RETENTION
– Defectivity below 1ppm/year
ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Device Code, M29F100T: 00D0h
– Device Code, M29F100B: 00D1h
DESCRIPTION
The M29F100 is a non-volatile memory that may
be erased electrically at the block or chip level and
programmed in-system on a Byte-by-Byteor Word-
by-Word basis using only a single 5V VCC supply.
For Program and Erase operations the necessary
high voltages are generated internally. The device
can also be programmed in standard program-
mers.
The array matrix organisation allows each block to
be erased and reprogrammed without affecting
other blocks. Blocks can be protected against pro-
graming and erase on programming equipment,
and temporarily unprotected to make changes in
the application. Each block can be programmed
and erased over 100,000 cycles.
July 1998
TSOP48 (N)
12 x 20 mm
44
1
SO44 (M)
Figure 1. Logic Diagram
VCC
16
A0-A15
15
DQ0-DQ14
W
DQ15A–1
M29F100T
E
M29F100B
BYTE
G
RB
RP
VSS
AI01974
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