DSM2180F3_08 Datasheet, PDF (1/63 Pages) STMicroelectronics – DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply)

DSM2180F3
DSM (Digital Signal Processor System Memory)
for analog devices ADSP-218X family (5 V supply)
NOT FOR NEW DESIGN
FEATURES SUMMARY
■ Glueless Connection to DSP
Figure 1. Packages
– Easily add memory, logic, and I/O to DSP
■ 128K Byte Flash Memory
– For Bootloading and/or Data Overlay Memory
– Programmable Decoding and Paging Logic
allows accessing Flash memory as Byte DMA
(BDMA) and as External Data Overlay mem-
) ory
t(s ^{– Rapidly access Flash memory with BDMA for}
c booting and loading internal DSP Overlay
u _{memory. Alternatively access the same Flash}
d _{memory as External Data Overlay memory to}
ro _{efficiently write Flash memory with code up-}
P _{dates and data, a byte at a time with no DMA}
te ^{setup overhead}
le – Individual 16K Byte Flash memory sectors
o _{match size of DSP External Data Overlay}
s _{window for efficient data management. Inte-}
b _{grated page logic provides easy DSP access}
- ^{O to all 128K Bytes.}
) _{– DSM connects to lower byte of 16-bit DSP}
t(s ^{data bus. Byte-wide accesses to 8-bit BDMA}
c space. Half-word accesses to 16-bit Data
u _{Memory Overlay and 16-bit I/O Mem space.}
rod ^{■ 5V Devices (±10%)}
■ Up to 16 Multifunction I/O Pins
te ^{P – Increase total DSP system I/O capability}
le ^{– I/O controlled by DSP software or PLD logic}
o – 8mA I/O pin drive at 5 Vcc
bs ^{■ General purpose PLD}
O – Over 3,000 Gates of PLD with 16 macro cells
PQFP52 (T)
PLCC52 (K)
■ In-System Programming (ISP) with JTAG
– Program entire chip in 10-20 seconds with no
involvement of the DSP
– Eliminate sockets for pre-programmed mem-
ory and logic devices
– Efficient manufacturing allows easy product
testing and Just-In-Time inventory
– Use low-cost FlashLINK^TM cable with PC
■ Content Security
– Programmable Security Bit blocks access of
device programmers and readers
■ Zero-Power Technology
– Use for peripheral glue logic to keypads, con-
trol panel, displays, LCD, UART devices, etc.
– Eliminate PLDs and external logic devices
– Create state machines, chip selects, simple
shifters and counters, clock dividers, delays
– Simple PSDsoft Express^TM software ...Free
– 75 μA standby at V_CC=5V
■ Small Packaging
– 52-pin PQFP or 52-pin PLCC
– Packages are ECOPACK^®
■ Memory Speed
– 90 ns
June 2008
Rev 2.0
This is information on a product still in production but not recommended for new designs.
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