CB45000 Datasheet, PDF (1/16 Pages) STMicroelectronics – HCMOS6 STANDARD CELLS

®
CB45000 SERIES
HCMOS6 STANDARD CELLS
FEATURES
s 0.35 micron 5 layer metal HCMOS6 process,
retrograde well technology, low resistance
salicided active areas and polysilicide gates.
s 3.3 V optimized transistor with 5 V I/O inter-
face capability
s 2 - input NAND delay of 160 ps (typ) with
fanout = 2.
s Broad I/O functionality including Low Voltage
CMOS, Low Voltage TTL and LVDS. Driving
capability to ISA, EISA, PCI, MCA, and SCSI
interface levels
s High drive I/O; capability of sinking up to 24
mA with slew rate control, current spike sup-
pression and impedance matching.
s Generators to support Single Port RAM,
Dual Port RAM, and ROM with BIST options.
s DRAM integration in ASIC methodology
s Extensive embedded function library includ-
ing ST DSP and micro cores, third party
micros and Synopsys synthetic libraries.
s Fully independent power and ground config-
urations for inputs, core and outputs.
s I/O ring capability up to 1000 pads.
s Latchup trigger current > +/- 500 mA.
ESD protection > +/- 4000 volts typical value
s Oscillators for wide frequency spectrum.
s Broad range of 500+ SSI cells
s Design For Test features including IEEE
1149.1 JTAG Boundary Scan architecture.
s Cadence, Mentor and Synopsys based
design systems with interfaces from multiple
workstations.
s Broad ceramic and plastic package range.
ROM
DSP
DPRAM
ST20
CB45000 Super-Integration
Cost Effective Product
s Architecture Partitioning
s Trouble free integration
s Application Specific
Your Product is Unique
s User specified cell integration
s Design Confidentiality
s IP fully re-usable
March 1998
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