AS21P2TLR Datasheet, PDF (1/22 Pages) STMicroelectronics – Low voltage 0.5 Ω max dual single-pole double-throw analog switch with break-before-make

AS21P2TLR
Low voltage 0.5 Ω max dual single-pole double-throw analog switch
with break-before-make
Datasheet - production data
(1.8 x 1.4 mm)
Features
 Ultra low power dissipation: I_CC = 0.2 µA (max.)
at T_A = 85 °C
 Low ON resistance V_IN = 0 V:
– R_ON = 0.50 Ω (max. T_A = 25 °C) at
V_CC = 4.3 V
– R_ON = 0.50 Ω (max. T_A = 25 °C) at
V_CC = 3.6 V
 Wide operating voltage range:
V_CC (OPR) = 1.65 to 4.3 V single supply
 4.3 V tolerant and 1.8 V compatible threshold
on digital control input at V_CC = 2.3 to 4.3 V
 Latch-up performance exceeds 300 mA
(JESD 17)
 ESD performance: HMB > 2 kV (MIL STD 883
method 3015)
Description
The AS21P2TLR is a high-speed CMOS single-
pole double-throw (SPDT) analog switch or dual
2:1 multiplexer/demultiplexer bus switch
fabricated using silicon gate C²MOS technology.
Designed to operate from 1.65 to 4.3 V, this
device is ideal for portable applications.
It offers very low ON resistance (R_ON < 0.5 ) at
V_CC = 3.6 V. The nIN inputs are provided to
control the independent channel switches nS1
and nS2. The switches nS1 are ON (connected to
common ports Dn) when the nIN input is held high
and OFF (state of high impedance exists between
the two ports) when nIN is held low. The switches
nS2 are ON (connected to common ports Dn)
when the nIN input is held low and OFF (state of
high impedance exists between the two ports)
when IN is held high. Additional key features are
fast switching speed, break-before-make delay
time and ultralow power consumption. All inputs
and outputs are equipped with protection circuits
against static discharge, giving them ESD and
excess transient voltage immunity.
Order code
AS21P2TLRQ
Table 1. Device summary
Package
QFN10L (1.8 x 1.4 mm)
Packing
Tape and reel
March 2014
This is information on a product in full production.
DocID026024 Rev 1
1/22
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