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AN4057 Datasheet, PDF (1/13 Pages) STMicroelectronics – This application note is addressed to system hardware designers using
AN4057
Application note
SPC560Pxx, SPC56APxx power up HW guideline
INTRODUCTION
This application note is addressed to system hardware designers using
STMicroelectronics® SPC560Pxx/SPC56APxx microcontrollers It gives design references
to ensure a reliable microcontroller power up sequence also in the condition of an offset
voltage on the high voltage regulator supply pin VDD_HV_REG at power up.
The use of the SPC560Pxx/SPC56APxx internal voltage regulator requires a specific design
ST approved ballasts with the recommended supporting network described in the latest
revision of the device data sheet (for further details see Section Appendix A: Additional
information). It is important to respect the power on sequence conditions, ensuring a
monotonic supply ramp starting at ground level and respecting the min and max slew rate
on VDD_HV_REG.
This application note covers:
■ Recommended power on sequence conditions
■ Possible deviations injecting an offset voltage on VDD_HV_REG and its impact on
microcontroller power up
■ Optional proposals to eliminate the effect of offset voltage on VDD_HV_REG pin
September 2013
Doc ID 022842 Rev 2
1/13
www.st.com