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AN3275 Datasheet, PDF (1/32 Pages) STMicroelectronics – Improving the performance of smartcard interfaces
AN3275
Application note
Improving the performance of smartcard interfaces
using the ST8024L
Introduction
The ST8024L is a smartcard interface offered as a drop-in replacement for the ST8024
device. Enhancements and changes to the ST8024L device include:
● Improved performance by reducing the noise sensitivity in the charge pump
● Incorporated 1.8 V VCC output
● Lower VTH threshold voltage
This application note provides information and suggestions for the optimal use and
performance of the ST8024L smartcard interface, including PCB layout, external component
placement, and connections (see ST8024L application hardware guidelines on page 18).
The implementation of all the blocks and procedures for card activation and deactivation
(see Figure 1) of the smartcard are also explained.
The ST8024L is a smartcard interface designed to minimize microprocessor hardware and
software complexity in all applications that require a smartcard (e.g., set-top box, electronic
payment, pay TV, and identification cards). The electrical characteristics of the ST8024L are
in accordance with New Digital Systems (NDS) and compliant with ISO7816-3, GSM11.11,
and EMV 4.0. Two devices (ST8024LCDR and ST8024LCTR) in the ST8024L family have
been certified by NDS.
Figure 1.
ST8024L internal block diagram
VDD
100nF
21
VDDP
100nF
6
100nF
C1– C1+
7
5
VDD
R1(1)
PORADJ/1.8V 18
R2(1)
23
OFF
20
RSTIN
19
CMDVCC
5V/3V
3
CLKDIV2(1)
1
CLKDIV2(2)
2
SUPPLY
INTERNAL
REFERENCE
Vref
VOLTAGE SENSE
STEP-UP CONVERTER
INTERNAL OSCILLATOR
2.5 MHz
ALARM
EN1 CLKUP
POWER_ON
EN2
VCC
PVCC GENERATOR
HORSEQ
CLOCK
CIRCUITRY
CLK
SEQUENCER
EN5 RST
BUFFER
EN4
CLOCK
BUFFER
XTAL1
24
XTAL2(2)
25
AUX1UC(2)
27
OSCILLATOR
ST8024L
AUX2UC(2)
28
I/OUC
26
22
GND
EN3
THERMAL
PROTECTION
I/O
TRANSCEIVER
I/O
TRANSCEIVER
I/O
TRANSCEIVER
4 PGND
8 VUP
100nF
17 VCC
14
100nF
CGND
16
RST
15
CLK
10
PRES
9
PRES(2)
13
AUX1(2)
12
AUX2(2)
11
I/O
CS18100
October 2010
Doc ID 17962 Rev 1
1/32
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