AN2269 Datasheet, PDF (1/25 Pages) STMicroelectronics – Using the ST8024 Smartcard Interface

AN2269
Application Note
Using the ST8024 Smartcard Interface
Introduction
This application note provides information and suggestions for the optimal use and
performance of the ST8024 Smartcard Interface, including PCB layout, external component
placement, and connections (see ST8024 Application Hardware Guidelines on page 16).
The ST8024 is a smart card interface designed to minimize microprocessor hardware and
software complexity in all applications that require a smart card (e.g., Set Top Box,
Electronic Payment, Pay TV, and Identification cards). It was developed in accordance with
New Digital Systems (NDS) conditional access requirements, and implements all of the
blocks and procedures for card activation/deactivation and checking (see Figure 1).
Figure 1. ST8024 Internal Block Diagram
VDD
21
Supply
Internal
Reference
Voltage
Supervisor
VDDP
S1 S2
ST8024 6
7
5
VREF
Step-up
Converter
Internal
Oscillator 2.5MHz
4 ^PGND
8 VUP
PORADJ 18
OFF 23
RSTIN 20
CMDVCC 19
5V/3V 3
Alarm
CLKUP
En1
En2
VCC
Generator
PVCC
En5 RST
Sequencer
Buffer
17 VCC
14 CGND
16 RST
CLKDIV1 1
CLKDIV2 2
En4
Clock
Circuitry
CLK
En4 _Clock
Buffer
15 CLK
10 PRES
9 PRES
XTAL1
XTAL2
24
25 _Oscillator
Thermal
Protection
En3
AUX1UC 27
AUX2UC 28
I/O UC 26
I/O Transceiver
I/O Transceiver
I/O Transceiver
13 AUX1
12 AUX2
11 I/O
22
GND
AI11884
February 2006
Rev 1
1/25
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