AN1301 Datasheet, PDF (1/8 Pages) STMicroelectronics – SINGLE PORT FAST ETHERNET TRANSCEIVER

AN1301
APPLICATION NOTE
STE100P - SINGLE PORT FAST ETHERNET TRANSCEIVER
1.0 GENERAL DESCRIPTION
The STE100P, also referred to as STEPHY1, is a high performance Fast Ethernet physical layer interface for
10BASE-T and 100BASE-TX applications. It was designed with advanced CMOS technology to provide a Media
Independent Interface (MII) for easy attachment to 10/100 Media Access Controllers (MAC) and a physical me-
dia interface for 100BASE-TX and 10BASE-T. The twisted pair interface directly drives a 10/100 twisted pair
connection. STE100P is an excellent device perfectly suited for hub, switch, router and other embedded Ether-
net applications.
The system diagram is as shown below:
Figure 1. System Diagram of the STE100P Application
S e rial
EEPROM
M AC
D evice
Boot ROM
LEDs
STE100P
STEPHY1
25 MHz
C r y s ta l
R J-4 5
2.0 FEATURES
n Integrates the whole physical layer functions of the 100BASE-TX and 10BASE-T
n 3.3V low power operation
n The hardware control pins set the initial state of the STE100P at power-up
n Designed with a power down feature, which can save the power consumption significantly
n Can operate for either full duplex or half duplex network applications.
n MII interface
n Provides auto-negotiation, parallel detection or manual control for mode setting
n Provides MLT-3 transceiver with DC restoration for Base-line wander compensation
November 2003
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