AN1214 Datasheet, PDF (1/6 Pages) STMicroelectronics – DESIGN TIPS FOR L6561 POWER FACTOR CORRECTOR

AN1214
APPLICATION NOTE
DESIGN TIPS FOR L6561 POWER FACTOR CORRECTOR
IN WIDE RANGE
by Cliff Ortmeyer & Claudio Adragna
This application note will describe some basic steps to optimize the design of the L6561 PFC for wide
range voltage input (105V- 300V) while also having a broad output power range (65W - 105W). Initial
design steps are covered in application note AN966. This is to serve as a supplement to that applica-
tion note and also give an example of a wide range demo board optimized for the US market (110V -
277V). A deeper look at the control of the L6561 can also be found in application note AN1089 “Control
loop modeling of L6561-based TM PFC”.
Introduction
Designing a PFC circuit with a singular input voltage and a singular output power is a task that is rather straight
forward and gives a very good set of component values when the design equations are used. The task becomes
a little more difficult when a wide range PFC is needed and the specifications are tight. This is common in ap-
plications such as lighting where there is a demand for good power factor ( >.99) and THD less than 10% in the
full range of nominal operating conditions. The problem occurs since the design must be done for the worst
case conditions which are a low input voltage and maximum output power. As we will see, this will diminish the
performance of the PFC circuit when the input voltage is high and the output power is low. What must be done
in this case is to look closely at the limits of the L6561 and external components and to optimize or compromise
where needed.
Design Tips
Multiplier Operation. Once the initial design is done and measurements have been made, the next step is to look
at the operating parameters of the L6561 to see that it is working within its full capabilities without going over its
linear operating range. A copy of the table we will be referring to is shown in Fig. 1.
Figure 1. Multiplier Characteristics
V_CS(pin4)
(V) upper voltage
clamp
1.6
5.0
1.4
4.0
1.2
1.0
D97IN555A
V_COMP(pin2)
(V)
3.5
3.2
0.8
0.6
3.0
0.4
0.2
0
0
2.8
2.6
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
V_MULT(pin3) (V)
For optimal operation the device should stay in the
linear operation of the multiplier. As can be seen,
there are three pins that should be measured in the
worst case conditions. The first is with the lowest in-
put voltage (low line) and the highest output power.
The second is at the highest input voltage (high line)
and the lowest output power. The first pin to be
measured is the Vcomp (pin2). This is the output of
the error amplifier (Figure 2) and will determine
which curve will be referenced when measuring the
other two parameters - Vcs and Vmult. Once this is
established, the peak voltage of the multiplier input
(pin 3) should be measured and noted. Next mea-
sure the peak voltage of the current sense resistor
(Vcs - pin 4). Looking at the graph in Figure 1, de-
termine which curve to use from the Vcomp voltage.
December 2000
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