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AIC-43C97 Datasheet, PDF (1/5 Pages) STMicroelectronics – Automated, High-performance, Integrated, SCSI Protocol Controller designed for SCSI-2/SCSI-3 embedded peripheral applications | |||
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AIC-43C97
Automated, High-performance, Integrated, SCSI Protocol Controller
designed for SCSI-2/SCSI-3 embedded peripheral applications
DATA BRIEF
1 SCSI Host Interface Block
â Dual Mode Ultra-2 I/O supporting Low
â Voltage Differential (LVD) and Single
â Ended SCSI Interfaces
â Ultra-2 (80 MB/s wide, 40 MB/s narrow) and
slower with LVD
â Ultra (40 MB/s wide, 20 MB/s narrow) and
slower with Single Ended
â Supports Target and Initiator Modes
â Programmable SCSI Sequencer for Target
Mode
â Automatic Command receipt with messages
â Automatic Disconnect and Reconnect
â Automatic Message
â Automatic Status
â Automatic parsing of frequently used SCSI
commands
â Reduced Microprocessor Overhead
â Auto Write & Auto Match operations
â Two active contexts to support command ex-
ecution pipelining or overlapping
â Two 16-byte SCSI Control FIFOâs
â 128-byte SCSI Data FIFO
â Block or byte-based transfer counter
â Odd-byte transfer support in byte mode
â Stores configuration information for up to three
SCSI devices
â Supports automatic SCAM selection and SCAM
transfer cycles
â Selectable REQ/ACK noise Filtering
2 DMA Interface Block
â âATA DMA Master/Slaveâ mode:
â Supports 8/16-bit transfers with programma-
ble speeds up to 40 MB/s in 16-bit mode
â âSCSI DMAâ mode:
â Supports 8/16-bit transfers with programma-
ble speeds up to 100 MB/s in 16-bit asynchro-
nous/synchronous mode
â âGenericâ mode:
â Supports 8/16-bit transfers with programma-
ble speeds up to 40 MB/s in 16-bit mode
Figure 1. Package
TQFP144
Table 1. Order Codes
Part Number
AIC-43C97M/C
Package
TQFP144
3 Microcontroller Interface Block
â Selectable µP Style and Bus Mode
â Multiplexed or non-multiplexed
â Selectable strobing style (*RD & *WR, or E/
*DS & R/*W)
â 16-bit or 8-bit data (8-bit data only in non-mul-
tiplexed mode)
â Programmable CS and INT polarities
â Supports wide variety of MPUs
â Intel 80C196xx
â Motorola 68HC11 & 68HC16
â NEC V852
â Hitachi SH-1 7034 & H8 3002
â Intel 80C186
4 Buffer Manager and Buffer RAM
â 8KB RAM for buffering data and speed
matching between and Host DMA ports
â Concurrent Buffer RAM access by Host and
DMA ports
â MPU access of Buffer RAM when DMA port is
disabled
â Parity protection on buffer data
â Block or Byte based data flow control between
Host and DMA ports
5 Frequency Synthesizer
â 960 MHz PLL for high resolution on selections
of HIFCLK and DIFCLK
December 2004
This is preliminary information on a new product now in development. Details are subject to change without notice.
Rev. 1
1/5
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