74LX1G14 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE CMOS SINGLE SCHMITT INVERTER WITH 5V TOLERANT INPUT

74LX1G14
LOW VOLTAGE CMOS SINGLE SCHMITT INVERTER
WITH 5V TOLERANT INPUT
s 5V TOLERANT INPUTS
s HIGH SPEED: t_PD = 7.5ns (MAX.) at V_CC = 3V
s LOW POWER DISSIPATION:
I_CC = 1µA (MAX.) at T_A = 25°C
s TYPICAL HYSTERESIS: V_h=1V at V_CC=4.5V
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN) at V_CC = 3V
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LX1G14 is a low voltage CMOS SINGLE
SCHMITT INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C²MOS
technology.
It is ideal for 1.65 to 5.5 V_CC operations and low
power and low noise applications. The internal
circuit is composed of 3 stages including buffer
output, which provide high noise immunity and
stable output.
Power down protection is provided on input and
output and 0 to 7V can be accepted on inputs with
SOT23-5L
SOT323-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74LX1G14STR
74LX1G14CTR
no regard to the supply voltage. It can be
interfaced to 5V signal environment for inputs in
mixed 3.3/5V system.
Pin configuration and function are the same as
those of the 74LX1G04 but the 74LX1G14 has
hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
The input is equipped with protection circuits
against static discharge, giving it ESD immunity
and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
December 2002
1/11