74LX1G08 Datasheet, PDF (1/10 Pages) STMicroelectronics – LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT

74LX1G08
LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE
WITH 5V TOLERANT INPUT
s 5V TOLERANT INPUTS
s HIGH SPEED: t_PD = 4.5ns (MAX.) at V_CC = 3V
s LOW POWER DISSIPATION:
I_CC = 1µA (MAX.) at T_A = 25°C
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN) at V_CC = 3V
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LX1G08 is a low voltage CMOS SINGLE
2-INPUT AND GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C²MOS
tecnology.
It is ideal for 1.65 to 5.5 V_CC operations and low
power and low noise applications. The internal
circuit is composed of 3 stages including buffer
SOT23-5
SC70-5
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74LX1G08STR
74LX1G08CTR
output, which provide high noise immunity and
stable output.
Power down protection is provided on input and
output and 0 to 7V can be accepted on inputs with
no regard to the supply voltage. It can be
interfaced to 5V signal environment for inputs in
mixed 3.3/5V system.
All inputs and outputs are equipped with
protection circuits against static discharge.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 2002
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