74LVX16374 Datasheet, PDF(1/10 Page) STMicroelectronics – LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP FLOP (3-STATE) WITH 5V TOLERANT INPUTS

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

74LVX16374 Datasheet, PDF (1/10 Pages) STMicroelectronics – LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP FLOP (3-STATE) WITH 5V TOLERANT INPUTS

74LVX16374

LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP FLOP (3-STATE)

WITH 5V TOLERANT INPUTS

s HIGH SPEED:

fMAX = 160 MHz (TYP.) at VCC = 3V

s 5V TOLERANT INPUTS

s POWER DOWN PROTECTION ON INPUTS

s INPUT VOLTAGE LEVEL:

VIL = 0.8V, VIH = 2V at VCC =3V

s LOW POWER DISSIPATION:

ICC = 4 ÂµA (MAX.) at TA=25Â°C

s LOW NOISE:

VOLP = 0.3V (TYP.) at VCC =3.3V

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 4 mA (MIN) at VCC =3V

s BALANCED PROPAGATION DELAYS:

tPLH â tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 16373

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVX16374 is a low voltage CMOS 16 BIT

D-TYPE FLIP-FLOP with 3 STATE OUTPUTS

NON INVERTING fabricated with sub-micron

silicon gate and double-layer metal wiring C2MOS

technology. It is ideal for low power, battery

operated and low noise 3.3V applications.

These 16 bit D-TYPE flip-flop is controlled by two

clock inputs (CK) and two output enable inputs

(nOE). The device can be used as two 8-bit

flip-flops or one 16-bit flip-flop.On the positive

transition of the clock, the Q outputs will be set to

the logic state that were setup at the D inputs.

While the (OE) input is low, the outputs will be in

a normal logic state (high or low logic level); while

OE is high, the outputs will be in a high impedance

state.The output control does not affect the inter-

nal operation of flip-flops; that is, the old data can

be retained or the new data can be entered even

while the outputs are off.Power down protection is

provided on all inputs and 0 to 7V can be accepted

on inputs with no regard to the supply voltage.This

device can be used to interface 5V to 3V. All in-

puts and outputs are equipped with protection cir-

cuits against static discharge, giving them 2KV

ESD immunity and transient excess voltage.

February 2003

TSSOP

ORDER CODES

PACKAGE

TSSOP

TUBE

PIN CONNECTION

T&R

74LVX16374TTR

1/10

▷