74LVX16244 Datasheet, PDF (1/10 Pages) STMicroelectronics – 16-BIT BUS BUFFER (NON INVERTED) WITH 3-STATE OUTPUTS, 5V TOLERANT INPUT

74LVX16244
16-BIT BUS BUFFER (NON INVERTED)
WITH 3-STATE OUTPUTS, 5V TOLERANT INPUT
s HIGH SPEED: t_PD = 5.3 ns (TYP.) at V_CC = 3V
s 5V TOLERANT INPUT
s LOW POWER DISSIPATION:
I_CC = 4 µA (MAX.) at T_A=25°C
s INPUT VOLTAGE LEVEL : V_IL= 0.8, V_IH=2V
AT V_CC=3V
s POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4 mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 2V to 3.6V (1.2V Data Retention)
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: V_OLP = 0.3V (TYP.) AT V_CC=3V
DESCRIPTION
The 74LVX16244 is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C²MOS technology.
Any nG output control governs four BUS
BUFFERS. Output Enable inputs (nG) tied
together give full 16 bit operation.
When nG is LOW, the outputs are enabled. When
nG is HIGH, the output are in high impedance
state.
The device is designed to be used with 3-state
memory address drivers, etc.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
TSSOP
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PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74LVX16244TTR
February 2003
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