74LVX14 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE CMOS HEX SCHMITT INVERTER WITH 5V TOLERANT INPUTS

74LVX14
LOW VOLTAGE CMOS HEX SCHMITT INVERTER
WITH 5V TOLERANT INPUTS
s HIGH SPEED:
t_PD = 6.8ns (TYP.) at V_CC = 3.3V
s 5V TOLERANT INPUTS
s LOW POWER DISSIPATION:
I_CC = 2 µA (MAX.) at T_A=25°C
s TYPICAL HYSTERESIS: 1V at V_CC = 3.3V
s LOW NOISE:
V_OLP = 0.3V (TYP.) at V_CC = 3.3V
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 2V to 3.6V (1.2V Data Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 14
s IMPROVED LATCH-UP IMMUNITY
s POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX14 is a low voltage CMOS HEX
SCHMITT INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C²MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVX14MTR
74LVX14TTR
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
Pin configuration and function are the same as
those of the 74LVX00 but the 74LVX14 has
hysteresis between the positive and the negative
input threshold typically of 1V.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 5
1/11