74LVQ4066_04 Datasheet, PDF (1/12 Pages) STMicroelectronics – QUAD BILATERAL SWITCH

74LVQ4066
QUAD BILATERAL SWITCH
s HIGH SPEED:
t_PD = 0.4 ns (TYP.) at V_CC = 3.3 V
t_PD = 0.1 ns (TYP.) at V_CC = 5 V
s LOW POWER DISSIPATION:
I_CC = 2µA (MAX.) at T_A=25°C
s LOW "ON " LOW RESISTANCE
R_ON = 14Ω at V_CC = 3.3V, I_I/O < 1 mA
R_ON = 12Ω at V_CC = 5.0V, I_I/O < 1 mA
s SINE WAVE DISTORTION:
0.04% at V_CC = 3.3V, f = 1KHz
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4066
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVQ4066 is a low voltage CMOS QUAD
BILATERAL SWITCH fabricated with sub-micron
silicon gate and double-layer metal wiring C²MOS
technology.
It is ideal for low power and low noise 3.3V
applications and each switch is designed to
handle both analog and digital signals.
The switches permit signals with amplitudes up to
V_CC (peak) to be transmitted in either direction
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVQ4066MTR
74LVQ4066TTR
without relevant propagation delay and without
generating additional ground bounce noise.
It has an ON-Resistance which is greatly reduced
in comparison with 74HC4066.
It is provided of four individual enable inputs to
control the switches; the switch is ON when the C
input is held high and OFF (High Impedance)
when C is held low.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 8
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