74LVC161284 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER

74LVC161284
LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER
s HIGH SPEED: t_PD = 9ns (MAX.) at V_CC = 3V
s LOW POWER DISSIPATION:
I_CC=20µA (MAX) at V_CC=3.6V T_A=85°C
s TTL COMPATIBLE INPUTS
V_IH=2V (MIN) V_IL=0.8(MAX)
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 3.0V to 3.6V
s A PORT HAVE STANDARD 4mA TOTEM
POLE OUTPUT
s B PORT HIGH DRIVE SOURCE/SINK
CAPABILITY OF 14mA
s SUPPORT IEEE STD 1284-I (LEVEL 1 TYPE)
AND IEEE STD 1284-II (LEVEL 2 TYPE) FOR
BIDIRECTIONAL PARALLEL
COMMUNICATIONS BETWEEN PERSONAL
COMPUTER ANT PRINTING PERIPHERALS
s TRANSLATION CAPABILITY ALLOW
OUTPUTS ON CABLE SIDE TO INTERFACE
WITH 5V SIGNAL
s PULL-UP RESISTOR INTEGRATED ON ALL
OPEN-DRAIN OUTPUT ELIMINATE THE
NEED FOR DISCRETE RESISTOR
s REPLACE THE FUNCTION OF TWO
74LVC1284 DEVICES
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74LVC161284TTR
DESCRIPTION
The 74LVC161284 contains eight high speed non
inverting bidirectional buffers and eleven control/
status non-inverting buffers with open drain
outputs fabricated in silicon gate C²MOS
technology. It’s intended to provide a standard
signaling method for a bi-direction parallel
peripheral in an Extended Capabilities Port Mode
(ECP). The HD (Active HIGH) input pin enables
the Cable port to switch from Open Drain to a high
drive totem pole output, capable of sourcing 14mA
on all thirteen buffer and 84mA on PERI LOGIC
OUTPUT buffer. The DIR input determines the
direction of data flow on the bidirectional buffers.
DIR (Active HIGH) enables data flow from A port
to B port. DIR (Active LOW) enables data flow
from B port to A port. It is available in the
commercial temperature range.
May 2003
1/11