74LVC14A Datasheet, PDF (1/12 Pages) NXP Semiconductors – Hex inverting Schmitt-trigger with 5V tolerant input

74LVC14A
LOW VOLTAGE CMOS HEX INVERTER
HIGH PERFORMANCE
s 5V TOLERANT INPUTS
s HIGH SPEED: t_PD = 5.0ns (MAX.) at V_CC = 3V
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN) at V_CC = 3V
s PCI BUS LEVELS GUARANTEED AT 24 mA
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 1.65V to 3.6V (1.2V Data
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
s LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LVC14A is a low voltage CMOS HEX
SCHMITT INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C²MOS
technology. It is ideal for 1.65 to 3.6 V_CC
operations and low power and low noise
applications.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVC14AMTR
74LVC14ATTR
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
Pin configuration and function are the same as
those of the 74LVC04A but the 74LVC14A has
hysteresis between the positive and negative
input threshold typically of 700mV.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 7
1/12