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74LCX652 Datasheet, PDF (1/16 Pages) Fairchild Semiconductor – Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs
74LCX652
LOW VOLT. CMOS OCTAL BUS TRANSCEIVER/REGISTER
WITH 5 VOLT TOLERANT INPUTS AND OUTPUTS(3-STATE)
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED:
tPD = 7.0 ns (MAX.) at VCC = 3V
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V
s PCI BUS LEVELS GUARANTEED AT 24 mA
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 652
s LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX652 is a low voltage CMOS OCTAL
BUS TRANSCEIVER AND REGISTER
(3-STATE) fabricated with sub-micron silicon gate
and double-layer metal wiring C2MOS technology.
It is ideal for low power and high speed 3.3V
applications; it can be interfaced to 5V signal
environment for both inputs and outputs.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LCX652RM13TR
74LCX652TTR
This device consists of bus transceiver circuits
with 3 state, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data
directly from the input bus or from the internal
storage registers. Enable (GAB) and (GBA) pins
are provided to control the transceiver functions.
Select AB and Select BA control pins are provided
to select whether real-time or stored data is
transferred. A low input level selects real-time,
and a high selects stored data.
Data on the A or B bus, or both, can be stored in
the internal D flip-flop by low to high transitions at
the appropriate clock pins (CAB or CBA)
regardless of the select or enable control pins.
When select AB and select BA are in the real-time
transfer mode, it is also possible to store data
Figure 1: Pin Connection And IEC Logic Symbols
September 2004
Rev. 6
1/16