English
Language : 

74ACT86_01 Datasheet, PDF (1/8 Pages) STMicroelectronics – QUAD EXCLUSIVE OR GATE
74ACT86
QUAD EXCLUSIVE OR GATE
s HIGH SPEED: tPD = 5.0ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), VIL = 0.8V (MAX.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74ACT86 is an advanced high-speed CMOS
QUAD EXCLUSIVE OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS tecnology.
The internal circuit is composed of 3 stages in-
cluding buffer output, which enables high noise
immunity and stabe output.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74ACT86B
74ACT86M
T&R
74ACT86MTR
74ACT86TTR
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/8