74ACT374 Datasheet, PDF (1/10 Pages) STMicroelectronics – OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

74ACT374
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
fMAX = 260 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 ^oC
s COMPATIBLE WITH TTL OUTPUTS
V_IH = 2V (MIN), V_IL = 0.8V (MAX)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 374
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT374 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C²MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
These 8 bit D-Type flip-flops are controlled by a
clock input (CK) and an output enable input (OE).
PIN CONNECTION AND IEC LOGIC SYMBOLS
B
M
(Plastic Package)
(Micro Package)
ORDER CODES :
74ACT374B
74ACT374M
On the positive transition of the clock, the Q
outputs will be set to logic state that were setup
at the D inputs.
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedance state.
The output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
The device is designed to interface directly High
Speed CMOS system with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
April 1997
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