74ACT174 Datasheet, PDF (1/10 Pages) STMicroelectronics – HEX D-TYPE FLIP FLOP WITH CLEAR

74ACT174
HEX D-TYPE FLIP FLOP WITH CLEAR
s HIGH SPEED:
fMAX = 200 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 ^oC
s COMPATIBLE WITH TTL OUTPUTS
V_IH = 2V (MIN), V_IL = 0.8V (MAX)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 174
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT174 is an high-speed CMOS HEX
D-TYPE FLIP FLOP WITH CLEAR fabricated
with sub-micron silicon gate and double-layer
metal wiring C²MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to eqivalent Bipolar Schottky
PRELIMINARY DATA
B
M
(Plastic Package)
(Micro Package)
ORDER CODES :
74ACT174B
74ACT174M
TTL.
Information signals applied to D inputs are
transfered to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentelyof the other inputs .
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 1997
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