74ACT16373 Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – 16-Bit Transparent Latch with 3-STATE Outputs

74ACT16373
16-BIT D-TYPE LATCH
WITH 3-STATE OUTPUTS (NON INVERTED)
s HIGH SPEED: t_PD = 5.3ns (TYP.) at V_CC = 5V
s LOW POWER DISSIPATION:
I_CC = 8µA(MAX.) at T_A=25°C
s COMPATIBLE WITH TTL OUTPUTS
V_IH = 2V (MIN.), V_IL = 0.8V (MAX.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN)
s OPERATING VOLTAGE RANGE:
V_CC (OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74ACT16373 is an advanced high-speed
CMOS 16-BIT D-TYPE LATCH (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C²MOS tecnology.
This 16 bit D-Type latch is controlled by two latch
enable inputs (LE) and two output enable inputs
(OE). The device can be used as two 8-bit latches
or one 16-bit latch.
While the LE input is held at a high level, the Q
outputs will follow the data inputs precisely. When
the LE is taken low, the Q outputs will be latched
precisely at the levels set up at the D inputs. While
the (OE) input is low, the outputs will be in a
normal logic state (high or low logic level) and
while OE is in high level the outputs will be in a
high impedance state.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
TSSOP
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PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74ACT16373TTR
February 2003
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