74AC174_01 Datasheet, PDF (1/11 Pages) STMicroelectronics – HEX D-TYPE FLIP FLOP WITH CLEAR

74AC174
HEX D-TYPE FLIP FLOP WITH CLEAR
s HIGH SPEED:
f_MAX = 250MHz (TYP.) at V_CC = 5V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 174
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC174 is an advanced high-speed CMOS
HEX D-TYPE FLIP FLOP WITH CLEAR
fabricated with sub-micron silicon gate and
double-layer metal wiring C²MOS tecnology.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC174B
74AC174M
T&R
74AC174MTR
74AC174TTR
Information signals applied to D inputs are
transferred to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
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