54VCXHR162245 Datasheet, PDF(1/11 Page) STMicroelectronics – LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

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54VCXHR162245 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

54VCXHR162245

LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER

(3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

s 3.6V TOLERANT INPUTS AND OUTPUTS

s HIGH SPEED IN BOTH A, B OUTPUTS:

tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V

tPD = 4.3 ns (MAX.) at VCC = 2.3 to 2.7V

s SYMMETRICAL IMPEDANCE OUTPUTS:

|IOH| = IOL = 12mA (MIN) at VCC = 3.0V

|IOH| = IOL = 8mA (MIN) at VCC = 2.3V

s POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

s 26â¦ SERIE RESISTORS IN BOTH A AND B

PORT OUTPUTS

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 2.3V to 3.6V

s PIN AND FUNCTION COMPATIBLE WITH

54 SERIES HR162245

s BUS HOLD PROVIDED ON BOTH SIDES

s LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

s ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V

s 100 Krad mil. 1019.6 (RHA QUAL)

CONDITION A

s NO SEL, NO SEU UNDER 72 Mev/cm2/mg

LET HEAVY IONS IRRADIATION

s PRODUCT UNDER QML-V QUALIFICATION

DESCRIPTION

The 54VCXHR162245 is a low voltage CMOS 16

BIT BUS TRANSCEIVER (3-STATE) fabricated

with sub-micron silicon gate and five-layer metal

wiring C2MOS technology. It is ideal for low power

and very high speed 2.3 to 3.6V applications; it

can be interfaced to 3.6V signal environment for

both inputs and outputs.

This IC is intended for two-way asynchronous

communication between data buses; the direction

of data transmission is determined by DIR input.

The two enable inputs nG can be used to disable

the device so that the buses are effectively

isolated. The device circuits is including 26â¦

series resistance in the A and B port outputs.

These resistors permit to reduce line noise in high

speed applications. Bus hold on data inputs is

provided in order to eliminate the need for external

pull-up or pull-down resistor.

July 2004

FPC-48

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage. All floating bus terminals during High Z

State must be held HIGH or LOW.

PIN CONNECTION

Rev. 1

1/11

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