CX9VSM_12 Datasheet, PDF (2/2 Pages) STATEK CORPORATION – Ultra-Miniature, Low Profile Surface Mount Quartz Crystal

SPECIFICATIONS
Specifications are typical at 25^OC unless otherwise noted.
Specifications are subject to change without notice.
Parameters
Fundamental
Overtone
Frequency, (kHz)
32.768 100 180 240
Motional Resistance R₁(kΩ) 60
19
5
4
Motional Capacitance C₁ (fF) 2.2
1.0 2.0
1.5
Quality Factor Q (k)
37
80
90
110
Shunt Capacitance C₀ (pF) 1.0
0.85 1.0
0.9
Load Capacitance (pF)¹
9
9
9
9
Turning Point (^oC)
20
16
20
25
Standard Calibration Tolerance for 32.768 kHz²
Glass Lid:
+_ _{30 ppm}
(0.003%)
+_ _{100 ppm}
(0.01%)
+_ _{1000 ppm}
(0.1%)
Ceramic Lid: ^+_ 100 ppm
(0.01%)
+_ _{1000 ppm} +_ _{10000 ppm}
(0.1%)
(1.0%)
Drive Level
0.5 µW MAX
Temperature Coefficient (k) -0.035 ppm/^OC²
Note: Frequency f at temperature T is related to frequency f₀ at
turning point temperature T₀ by:
f-f₀
f₀
=
k(T-T₀)²
Aging, first year
3 ppm
Shock, survival³
5,000 g, 0.3 ms, 1/2 sine
Vibration, survival
20 g RMS, 10-2,000 Hz random
Operating Temp. Range
Storage Temp. Range
-10^OC to +70^OC (Commercial)
-40^OC to +85^OC (Industrial)
-55^OC to +125^OC (Military)
-55^OC to +125^OC
Max Process Temperature 260^OC for 20 sec.
1. Other values available
2. Tighter tolerances available
3. Higher shock available
TERMINATIONS
Designation
SM1
SM2
SM3
SM4
SM5
Termination
Gold Plated (Lead Free)
Solder Plated
Solder Dipped
Solder Plated (Lead Free)
Solder Dipped (Lead Free)
Max Process Temperature 260^OC for 20 sec.
TYPICAL APPLICATION
FOR A PIERCE OSCILLATOR
The CX9 family of surface mount crystals are ideal for
small, high density, battery operated portable products. The
CX9 crystal designed in a Pierce oscillator (single inverter)
circuit provides very low current consumption and high
stability. A conventional CMOS Pierce oscillator circuit is
shown below. The crystal is effectively inductive and in a PI-
network circuit with C_D and C_G provides the additional
phase shift necessary to sustain oscillation. The oscillation
frequency (f₀) is 50 to 150 ppm above the crystal’s series
resonant frequency (f_S).
Drive Level
R_A is used to limit the crystal’s drive level by forming a
voltage divider between R_A and C_D. R_A also stabilizes the
oscillator against changes in the amplifiers output
resistance (R₀). R_A should be increased for higher voltage
operation.
Load Capacitance
The CX9 crystal calibration tolerance is influenced by the
effective circuit capacitances, specified as the load
capacitance (C_L). C_L is approximately equal to:
C_L
=
C_D
C_D
x
+
C_{G +}
C_G
C_S
(1)
NOTE: C_D and C_G include stray layout to ground and C_S
is the stray shunt capacitance between the crystal
terminal. In practice, the effective value of C_L will be less
than that calculated from C_D, C_G and C_S values because
of the effect of the amplifier output resistance. C_S should
be minimized.
The oscillation frequency (f₀) is approximately equal to:
Where
[ ] ^{f0 = fS}
1⁺
C₁
2(C₀ +
C_L)
(2)
f_S ^{= Series resonant frequency of the crystal}
C₁ ^{= Motional Capacitance}
C₀ ^{= Shunt Capacitance}
CONVENTIONAL CMOS
PIERCE OSCILLATOR CIRCUIT
R_f
BUFFER
AMPLIFIER
R_A
OSC
Freq (f_O)
HOW TO ORDER CX9VSM CRYSTALS
CX9V S
C
SM1
32.768K , 100 / I
C = Ceramic Lid
Blank = Glass Lid
Frequency
K = kHz
“S” if special or
custom design.
Blank if Std.
SM1 = Gold Plated (Lead Free)
SM2 = Solder Plated
SM3 = Solder Dipped
SM4 = Solder Plated (Lead Free)
SM5 = Solder Dipped (Lead Free)
Calibration
Tolerance
@ 25^OC
(in ppm)
Operating Temp. Range:
C = -10^OC to +70^OC
I = -40^OC to +85^OC
M = -55^OC to +125^OC
S = Customer Specified
C_G
CX9
C_D
PACKAGING OPTIONS
Tray Pack or 16mm tape, 7” or 13” reels
(Reference tape and reel data sheet 10109)
10157 - Rev D
STATEK CORPORATION 512 N. MAIN ST., ORANGE, CA 92868 714-639-7810 FAX: [phone] www.statek.com