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ST9435GP Datasheet, PDF (1/6 Pages) Stanson Technology – P Channel Enhancement Mode MOSFET
ST9435GP
P Channel Enhancement Mode MOSFET
-15.0A
DESCRIPTION
ST9435GP is the P-Channel logic enhancement mode power field effect transistor
which is produced using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These device is particularly suited for low voltage application, notebook computer
power management and other battery circuits where high-side switching.
PIN CONFIGURATION
FEATURE
-30V/-10A, RDS(ON) = 50mΩ
@VGS = -10V
-30V/-5A, RDS(ON) = 80mΩ
@VGS = -4.5V
Super high density cell design for
extremely low RDS(ON)
Exceptional on-resistance and
maximum DC current capability
TO-220 package design
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(TJ=150℃)
Pulsed Drain Current
Symb
ol
VDSS
TA=25℃
TA=100℃
VGSS
ID
IDM
Typical
-30
±20
-15.0
-8.0
-60
Power Dissipation
TA=25℃
PD
62.5
Operation Junction Temperature
Storgae Temperature Range
TJ
TSTG
-55/150
-55/150
Thermal Resistance-Junction to Ambient
RθJA
62
Unit
V
V
A
A
W
℃
℃
℃/W
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2009, Stanson Corp.
ST9435GP 2010. V1