ST2319SRG Datasheet, PDF(1/8 Page) Stanson Technology – ST2319SRG is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology.

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ST2319SRG Datasheet, PDF (1/8 Pages) Stanson Technology – ST2319SRG is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology.

ST2319SRG

P Channel Enhancement Mode MOSFET

-3.5A

DESCRIPTION

ST2319SRG is the P-Channel logic enhancement mode power field effect transistor is

produced using high cell density, DMOS trench technology. This high density process

is especially tailored to minimize on-state resistance. These devices are particularly

suited for low voltage application such as cellular phone and notebook computer

power management and other battery powered circuits where high-side switching and

low in-line power loss are required in a very small outline surface mount package.

PIN CONFIGURATION

SOT-23

1.Gate 2.Source 3.Drain

PART MARKING

SOT-23

19YW

Y: Year Code W: Week Code

FEATURE

-40V/-3.5A, RDS(ON) = 75mâ¦ (Typ.)

@VGS = -10V

-40V/-2.8A, RDS(ON) = 105mâ¦

@VGS = -4.5V

Super high density cell design for

extremely low RDS(ON)

Exceptional on-resistance and maximum

DC current capability

SOT-23 package design

STANSON TECHNOLOGY

120 Bentley Square, Mountain View, Ca 94040 USA

www.stansontech.com

ST2319SRG 2009. Rev.1

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