ST2315SRG Datasheet, PDF (1/6 Pages) Stanson Technology – ST2315SRG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology.

ST2315SRG
P Channel Enhancement Mode MOSFET
-4.0A
DESCRIPTION
ST2315SRG is the P-Channel logic enhancement mode power field effect transistor
which is produced using high cell density, DMOS trench technology. This high density
process is especially tailored to minimize on-state resistance. These devices are
particularly suited for low voltage application such as cellular phone and notebook
computer power management, other battery powered circuits, and low in-line power
loss are required. The product is in a very small outline surface mount package.
PIN CONFIGURATION
SOT-23
3
D
G
S
1
2
1.Gate 2.Source 3.Drain
PART MARKING
SOT-23
FEATURE
-20V/-4.0A, R_DS(ON) = 40m-ohm (Typ.)
@VGS = -4.5V
-20V/-3.0A, R_DS(ON) = 60m-ohm
@VGS = -2.5V
-20V/-2.0A, RDS(ON)= 90m-ohm
@VGS=-1.8V
Super high density cell design for
extremely low R_DS(ON)
Exceptional on-resistance and maximum
DC current capability
SOT-23 package design
3
05YA
1
2
Y: Year Code A: Process Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST2315SRG 2010. V1