ST1005SRG Datasheet, PDF (1/5 Pages) Stanson Technology – P Channel Enhancement Mode MOSFET

ST1005SRG
P Channel Enhancement Mode MOSFET
-0.8A
DESCRIPTION
ST1005SRG is the P-Channel logic enhancement mode power field effect transistor
which is produced using high cell density, DMOS trench technology. This high density
process is especially tailored to minimize on-state resistance. These devices are
particularly suited for low voltage application such as cellular phone and notebook
computer power management, other battery powered circuits, and low in-line power
loss are required. The product is in a very small outline surface mount package.
PIN CONFIGURATION
SOT-23
3
D
G
S
1
2
FEATURE
l -100V/-0.8.0A, R_DS(ON) = 650m-ohm (Typ.)
@VGS = -10V
l -60V/-0.4A, R_DS(ON) = 700m-ohm
@VGS = -4.5V
l Super high density cell design for
extremely low R_DS(ON)
l Exceptional on-resistance and maximum
DC current capability
l SOT-23 package design
1.Gate 2.Source 3.Drain
PART MARKING
SOT-23
3
105YA
1
2
Y: Year Code A: Process Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1005SRG 2013. Rev.1