SSTX4915 Datasheet, PDF (5/9 Pages) Silicon Storage Technology, Inc – LOW POWER ASK TRANSMITTER IC

SSTX4915
Functional Description
The SSTX4915 is a low-power ASK transmitter IC designed for applications operating within the frequency
range of 100 to 960 MHz. In particular, it is intended for transmitter applications in 315/433 MHz band
remote keyless entry and 868/915 MHz ISM-band systems. In addition, the SSTX4915 possesses a PLL-only
mode which allows it to be simply used as a local oscillator source. The integrated voltage-controlled oscil-
lator (VCO), phase/frequency detector, prescaler, and reference oscillator require only the addition of an
external crystal to provide a complete phase-locked loop. In addition to the normal operation mode, the
chip also includes an automatic lock-detect feature that disables the transmitter output when the PLL is out-
of-lock.
Reference crystal oscillator
The OSCIN and OSCOUT inputs (pins 1 and 2) provide connections to an on-chip transistor which may be
used to implement a Colpitts crystal oscillator. The Colpitts oscillator configuration is a low parts count
topology which achieves reasonable phase noise performance. Optionally, an external signal may be ac-
coupled into the OSCIN pin to provide a reference source. The OSCIN input drive level should be near 500
mV_pk-pk to prevent overdriving the on-chip transistor in order to keep the phase noise and reference spurs to
a minimum.
Voltage controlled oscillator
The VCO uses a tuned differential amplifier topology with the bases and collectors cross-coupled to pro-
vide positive feedback and the necessary 360° phase shift. A tuned circuit is connected to the open collec-
tor outputs and is comprised of both on-chip varactors and user-selectable off-chip inductors. The choice of
inductor values determines the frequency band of operation.
Dual-modulus prescaler
A series of flip-flops divides the VCO frequency by either 64 or 128, depending upon the logic level of the
SW input (pin 16). SW = high will select the ÷ 64 mode and SW = low will select the ÷ 128 mode. The
divided-down signal is then applied to the phase/frequency detector where its phase/frequency is compared
with the phase/frequency of the crystal reference.
Phase/frequency detector and charge pump
The phase/frequency detector (PFD) is implemented using the “tri-state comparator” topology while the
charge pump (CP) consists of a current source and sink for charging and discharging the off-chip loop filter.
When the VCO and reference inputs to the PFD are both phase- and frequency-locked, the CP output enters
a high impedance state. Otherwise, the CP will either charge or discharge the loop filter.
Out-of-lock inhibit circuitry
The out-of-lock inhibit circuitry is used to disable the transmitter output when the VCO is not locked to the
reference oscillator and comply with regulatory limits during the unlocked condition. An off-chip shunt
capacitor connected to the LD output (pin 15) is used to set an R-C time constant (together with an on-chip
series 1 K. resistor.) This time constant should be set to be approximately 15 times the reference period.
Rev.2.02 8/06/2003
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