SST89E564 Datasheet, PDF (28/58 Pages) Silicon Storage Technology, Inc – FlashFlex51 MCU

FlashFlex51 MCU
SST89E564 / SST89V564 / SST89E554 / SST89V554
Preliminary Specifications
4.1.7 Flash Memory Programming Timing Diagrams with External Host Mode
TSU
RST
TES
PSEN#
ALE/PROG#
EA#
P2[7:6] ,P3[7:6]
P3[5:4] ,P2[5:0] ,P1
P0
TRD
0000b
0030H
BFH
TRD
0000b
0031H
Device ID
Device ID = 93H for SST89E564
92H for SST89V564
9BH for SST89E554
9AH for SST89V554
FIGURE 4-2: READ-ID
Reads chip signature and identification registers at the addressed location.
384 ILL F02.3
RST
PSEN#
ALE/PROG#
EA#
P3[3]
P3[5:4], P2[5:0]
TSU
TES
TADS
TPROG
TDH
A5H/55H
TPSB
P3[7:6], P2[7:6]
1001b
384 ILL F56.1
FIGURE 4-3: SELECT-BLOCK1 / SELECT-BLOCK0
Enables the selection of either of the flash memory blocks prior to issuing a Byte-Verify, Block-Erase, Sector-
Erase, or Byte-Program. These commands apply to SST89E564/SST89V564 only.
©2001 Silicon Storage Technology, Inc.
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