SST89C54 Datasheet, PDF (1/50 Pages) Silicon Storage Technology, Inc – FlashFlex51 MCU

FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
FEATURES:
• Multi-Purpose 8-bit 8051 Family Compatible
Microcontroller Unit (MCU) with Embedded
• High Current Drive on Port 1 (5, 6, 7) pins
• Three 16-bit Timer/Counter
1
SuperFlash Memory
• Programmable Serial Port (UART)
• Fully Software and Development Toolset
Compatible as well as Pin-For-Pin Package
• Six Interrupt Sources at 2 Priority Levels
2
Compatible with Standard 8xC5x
• Selectable Watchdog Timer (WDT)
Microcontrollers
• 256 Bytes Register/Data RAM
• Four 8-bit I/O Ports (32 I/O Pins)
3
• 20/36 KByte Embedded High Performance
• TTL- and CMOS-Compatible Logic Levels
Flexible SuperFlash EEPROM
• Extended Power-Saving Modes
4
– One 16/32 KByte block (128-Byte
– Idle Mode
sector size)
– Power Down Mode with External Interrupt
– One 4 KByte block (64-Byte sector size)
– Individual Block Security Lock with Softlock™
Wake-up
– Standby (Stop Clock) Mode
5
feature
– 87C5x Programmer Compatible
– Concurrent Operation during In-Application
• High Speed Operation at 5 Volts (0 to 33MHz)
• Low Voltage (2.7V) Operation (0 to 12MHz)
6
Programming™(IAP™)
• PDIP-40, PLCC-44 and TQFP-44 Packages
– Memory Re-Mapping for Interrupt Support
during IAP
• Temperature Ranges:
7
• Support External Address Range up to
64 KByte of Program and Data Memory
– Commercial (0°C to +70°C)
– Industrial (-40°C to +85°C)
PRODUCT DESCRIPTION
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via a standard 87C5x OTP EPROM programmer fitted
with a special adapter and firmware for SST89C54/58
SST89C54 and SST89C58 are members of the
FlashFlex51 family of 8-bit microcontrollers. The
devices. During the power-on reset, the SST89C54/58
can be configured as a master for source code storage
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FlashFlex51 family is a family of embedded
or as a slave to an external host for In-Application
microcontroller products designed and manufactured on
the state-of-the-art SuperFlash CMOS semiconductor
Programming (IAP) operation. SST89C54/58 is de-
signed to be programmed “In-System” and “In-Applica-
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process technology.
tion” on the printed circuit board for maximum flexibility.
As a member of the FlashFlex51 controller family, the
SST89C54/58 uses the same powerful instruction set,
The device is pre-programmed with a sample bootstrap
loader in the memory (see Note 1), demonstrating the
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has the same architecture, and is pin-for-pin compatible ^{initial user program code loading or subsequent user}
with standard 8xC5x microcontroller devices.
code updating via the “IAP” operation.
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SST89C54/58 comes with 20/36 KByte of ^{In addition to 20/36 KByte of SuperFlash EEPROM}
integrated on-chip flash EEPROM program memory ^{program memory on-chip, the SST89C54/58 can ad-}
using the patented and proprietary Silicon Storage
dress up to 64 KByte of program memory external to the
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Technology, Inc. (SST) CMOS SuperFlash EEPROM ^{chip. The SST89C54/58 have 256 x 8 bits of on-chip}
technology with the SST field enhancing tunneling ^{RAM. Up to 64 KByte of external data memory (RAM)}
injector split-gate memory cells. The SuperFlash ^{can be addressed.}
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memory is partitioned into 2 independent program
The highly reliable, patented SuperFlash technology and
memory blocks. The primary SuperFlash Block 0 occu-
memory cell architecture have a number of important
pies 16/32 KByte of internal program memory space and
advantages for designing and manufacturing flash
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the secondary SuperFlash Block 1 occupies 4 KByte of
EEPROMs, when compared with other approaches.
SST89C54/58’s internal program memory space. The 4
These advantages translate into significant cost and
KByte secondary SuperFlash block can be mapped to
reliability benefits for our customers.
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the highest or lowest location of the 64 KByte address
space; it can also be hidden from the program counter
and used as an independent EEPROM-like data
Note 1: The sample bootstrap loader is for the user’s reference and
convenience only. SST does not guarantee the functionality
or the usefulness of the sample bootstrap loader. Chip-Erase
memory. The flash memory blocks can be programmed
or Block-Erase operations will erase the pre-programmed
sample code.
© 2000 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. FlashFlex, In-Application Programming, IAP and SoftLock are
344-2 8/00
trad1emarks of Silicon Storage Technology, Inc. These specifications are subject to change without notice.