SST49LF160C Datasheet, PDF (1/35 Pages) Silicon Storage Technology, Inc – 16 Mbit LPC Flash

16 Mbit LPC Flash
SST49LF160C
FEATURES:
160C16Mb LPC Flash
Advance Information
• Organized as 2M x8
• Conforms to LPC Interface Specification
– Support Single-Byte LPC Memory Read/Write
Cycles
• Single 3.0-3.6V Read and Write Operations
• LPC Mode
– 5-signal LPC bus interface for both in-system
and factory programming using programmer
equipment
– 33 MHz clock frequency operation
– WP#/AAI and TBL# pins provide hardware Write
protect for entire chip and/or top Boot Block
– Block Locking Registers for individual block Read-
Lock, Write-Lock, and Lock-Down protection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
– Status register for End-of-Write detection
– Program-/Erase-Suspend
Read or Write to other blocks during
Program-/Erase-Suspend
• Two-cycle Command Set
• Security ID Feature
– 256-bit Secure ID space
- 64-bit Unique Factory Pre-programmed
Device Identifier
- 192-bit User-Programmable OTP
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Read Current: 12 mA (typical)
– Standby Current: 10 µA (typical)
• Uniform 4 KByte sectors
– 35 Overlay Blocks: one 16-KByte Boot Block,
two 8-KByte Parameter Blocks, one 32-Kbyte
Parameter Block, thirty-one 64-KByte Main
Blocks.
• Fast Sector-Erase/Program Operation
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Program Time: 7 µs (typical)
• Auto Address Increment (AAI) for Rapid Factory
Programming (High Voltage Enabled)
– RY/BY# pin for End-of-Write detection
– Multi-Byte Program
– Chip Rewrite Time: 4 seconds (typical)
• Packages Available
– 32-lead PLCC
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST49LF160C flash memory device is designed to
interface with host controllers (chipsets) that support a low-
pin-count (LPC) interface for system firmware applications.
The SST49LF160C device complies with the LPC Interface
Specification. The LPC interface operates with 5 signal pins
versus 32 pins of a 8-bit parallel flash memory. This frees
up pins on the ASIC host controller resulting in lower ASIC
costs and a reduction in overall system costs due to simpli-
fied signal routing.
The SST49LF160C uses a 5-signal LPC interface to sup-
port both in-system and rapid factory programming using
programmer equipment. A high voltage pin (WP#/AAI) is
used to enable Auto Address Increment (AAI) mode. The
SST49LF160C offers hardware block protection in addition
to individual block protection via software registers for critical
system code and data. A 256-bit Security ID space with a
64-bit factory pre-programmed unique number and a 192-
bit user programmable OTP area enhances the user’s abil-
ity to use new security techniques and implement a new
data protection scheme. The SST49LF160C also provides
general purpose inputs (GPI) for system design flexibility.
The SST49LF160C flash memory device is manufactured
with SST’s proprietary, high-performance SuperFlash tech-
nology. The split-gate cell design and thick-oxide tunneling
injector attain greater reliability and manufacturability com-
pared with alternative technology approaches. The
SST49LF160C device significantly improves performance
and reliability, while lowering power consumption. The
SST49LF160C device writes (Program or Erase) in-system
with a single 3.0-3.6V power supply. It uses less energy
during Erase and Program than alternative flash memory
technologies.
©2006 Silicon Storage Technology, Inc.
S71315-00-000
4/06
1
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.
Intel is a registered trademark of Intel Corporation.
These specifications are subject to change without notice.