SST29EE010A Datasheet, PDF (1/26 Pages) Silicon Storage Technology, Inc – 1 Megabit (128K x 8) Page Mode EEPROM

1 Megabit (128K x 8) Page Mode EEPROM
SST29EE010A / SST29LE010A / SST29VE010A
FEATURES:
• Single Voltage Read and Write Operations
– 5.0V-only for the SST29EE010A
– 3.0-3.6V for the SST29LE010A
– 2.7-3.6V for the SST29VE010A
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Current: 20 mA (typical) for 5V and
10 mA (typical) for 3.0/2.7V
– Standby Current: 10 µA (typical)
• Fast Page Write Operation
– 128 Bytes per Page, 1024 Pages
– Page Write Cycle: 5 ms (typical)
– Complete Memory Rewrite: 5 sec (typical)
– Effective Byte Write Cycle Time: 39 µs
(typical)
Data Sheet
• Fast Read Access Time
– 5.0V-only operation: 90 and 120 ns
1
– 3.0-3.6V operation: 150 and 200 ns
– 2.7-3.6V operation: 200 and 250 ns
• Latched Address and Data
2
• Automatic Write Timing
– Internal VPP Generation
• End of Write Detection
3
– Toggle Bit
– Data# Polling
• Hardware and Software Data Protection
4
• TTL I/O Compatibility
• JEDEC Standard
5
– Flash EEPROM Pinouts and command sets
• Packages Available
– 32 Pin PDIP
6
– 32-Pin PLCC
– 32-Pin TSOP (8mm x 20mm & 8mm x 14mm)
7
PRODUCT DESCRIPTION
updating of program, configuration, or data memory. For
all system applications, the SST29EE010A/29LE010A/ ₈
The SST29EE010A/29LE010A/29VE010A are 128K x 8 29VE010A significantly improve performance and reli-
CMOS Page Write EEPROMs manufactured with SST’s ability, while lowering power consumption. The
proprietary, high performance CMOS SuperFlash tech-
SST29EE010A/29LE010A/29VE010A improve flexibil-
9
nology. The split-gate cell design and thick oxide tunnel- ity while lowering the cost for program, data, and configu-
ing injector attain better reliability and manufacturability ration storage applications.
compared with alternate approaches. The
SST29EE010A/29LE010A/29VE010A write with a
single power supply. Internal Erase/Program is transpar-
ent to the user. The SST29EE010A/29LE010A/
29VE010A conform to JEDEC standard pinouts for byte-
wide memories.
To meet high density, surface mount requirements, the
SST29EE010A/29LE010A/29VE010A are offered in 32-
pin TSOP and 32-lead PLCC packages. A 600-mil, 32-
pin PDIP package is also available. See Figures 1 and 2
for pinouts.
10
11
Featuring high performance page write, the Device Operation
12
SST29EE010A/29LE010A/29VE010A provide a typical The SST page mode EEPROM offers in-circuit electrical
byte-write time of 39 µsec. The entire memory, i.e., 128 write capability. The SST29EE010A/29LE010A/
KBytes, can be written page-by-page in as little as 5
29VE010A does not require separate Erase and
13
seconds, when using interface features such as Toggle Program operations. The internally timed write cycle
Bit or Data# Polling to indicate the completion of a write executes both erase and program transparently to the
cycle. To protect against inadvertent write, the
user. The SST29EE010A/29LE010A/29VE010A have
14
SST29EE010A/29LE010A/29VE010A have on-chip industry standard Software Data Protection. The
hardware and software data protection schemes. De- SST29EE010A/29LE010A/29VE010A are compatible
signed, manufactured, and tested for a wide spectrum of
with industry standard EEPROM pinouts and
15
applications, the SST29EE010A/29LE010A/29VE010A functionality.
are offered with a guaranteed page write endurance of
10⁴ cycles. Data retention is rated at greater than 100 Read
16
years.
The Read operations of the SST29EE010A/29LE010A/
The SST29EE010A/29LE010A/29VE010A are suited
for applications that require convenient and economical
29VE010A are controlled by CE# and OE#, both have to
be low for the system to obtain data from the outputs.
© 1999 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. These specifications are subject to change without notice.
303-01 2/99
1