ALSD05BT Datasheet, PDF (3/3 Pages) StarHope – Electro-Static Discharge for Aotomobile

SPSEMI
Application Information
I/O Protection
I/O
I/O
ALSD05BT
ESD/ALSD05BT
I/O
I/O
ALSD05BT
PCB Layout Recommendations
The location and circuit board layout is critical to maximize the effectiveness of the I/O protection circuit.
The following guidelines are recommended:
Locate the protection devices as close as possible to the I/O connector. This allows the protection devices
to absorb the energy of the transient voltage before it can be coupled into the adjacent traces on the PCB.
Minimize the loop area for the high.speed data lines, power and ground lines to reduce the radiated emissions.
Avoid running protection conductors in parallel with unprotected conductors
Use ground planes wherever possible to reduce the parasitic capacitance and inductance of the PCB that
degrades the effectiveness of a filter device.
Using shared transient return paths to a common ground point.
Dimensions(0402)
0402
A
B
B
C
C
D1 D2
Recommended Mounting Pad Layout
1.20
0.047
0.75
0.030
0.75
0.030
DIM
A
B
C
D1/D2
Millimeters
Min Max
0.90 1.10
0.50 0.70
0.60
0.10 0.40
Inches
Min Max
0.035 0.043
0.020 0.027
0.023
0.004 0.016
REV.2017.07.24
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