CY28323PVC Datasheet, PDF (7/21 Pages) SpectraLinear Inc – FTG for Intel® Pentium® 4 CPU and Chipsets

Data Byte 1 (continued)
Bit
Bit 2
Bit 1
Bit 0
Pin#
28
30
31
3V66_2
3V66_1
3V66_0
Data Byte 2
Name
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
--
17
16
15
14
12
11
10
Reserved
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Name
Data Byte 3
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
8
7
6
--
44, 45
--
1
48
Name
PCI_F2
PCI_F1
PCI_F0
Reserved
CPU_ITP, CPU_ITP#
Reserved
REF1
REF0
Data Byte 4
Bit
Bit 7
Pin#
Name
-- MULTSEL_Override
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-- SW_MULTSEL1
-- SW_MULTSEL0
--
Reserved
--
Reserved
--
Reserved
-- Reserved
-- Reserved
CY28323PVC
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Description
Power On
Default
1
1
1
Reserved
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Pin Description
Power On
Default
0
1
1
1
1
1
1
1
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Reserved
(Active/Inactive)
Reserved
(Active/Inactive)
(Active/Inactive)
Pin Description
Power On
Default
1
1
1
0
1
0
1
1
Pin Description
This bit control the selection of IREF multiple.
0 = HW control; IREF multiplier is determined by
MULTSEL[0:1] input pins
1 = SW control; IREF multiplier is determined by Byte[4],
Bit[5:6].
IREF multiplier
00 = Ioh is 4 x IREF
01 = Ioh is 5 x IREF
10 = Ioh is 6 x IREF
11 = Ioh is 7 x IREF
Reserved
Reserved
Reserved
Reserved
Reserved
Power On
Default
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Rev 1.0, November 24, 2006
Page 7 of 21