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CY2SSTV16859 Datasheet, PDF (3/7 Pages) Cypress Semiconductor – 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant
CY2SSTV16859
Absolute Maximum Conditions[4,5]
Parameter
Description
Condition
VTERM[6]
VTERM[7]
Terminal Voltage with respect to VSS
Terminal Voltage with respect to VSS
TSTG
Storage Temperature
IOUT
DC Output Current
IIK
Continuous Clamp Current
VI<0 or VI>VSS
IOK
Continuous Clamp Current
VO<0 or VO>VDD
Idd
Continuous Current through each VDD, VDDQ or VSS
ISS
Min.
–0.5
–0.5
–65°
–50
–50
–50
–100
Max.
Unit
3.6
V
VDD + 0.5
V
150°C
°C
50
mA
50
mA
50
mA
100
mA
Recommended Operating Conditions[8]
Parameter
Description
Min.
Typ.
Max.
Unit
VDD Supply voltage
2.3
2.5
VDDQ Output supply voltage PC1600,PC2100,PC2700
2.3
2.5
PC3200
2.5
2.6
2.7
V
2.7
V
2.7
V
VREF
Reference voltage
(VREF = VDDQ/2)
PC1600,PC2100,PC2700
PC3200
1.15
1.25
1.25
1.3
1.35
V
1.35
V
VTT Termination voltage
VI
Input voltage
VIH
AC Data Input high-level voltage
VIL
AC Data Input low-level voltage
VIH
DC Data Input high-level voltage
VIL
DC Data Input low-level voltage
VIH
RESET# Input high-level voltage
VIL
RESET# Input low-level voltage
VICR CLK, CLK# Common-mode input voltage range
VI(PP) CLK, CLK# Peak-to-peak input voltage
IOH
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
DC Electrical Specifications
VREF – 40 mV
0
VREF + 310 mV
–
VREF + 150 mV
–
1.7
–
0.97
360
–
–
0
VREF
–
–
–
–
–
–
–
–
–
–
–
–
VREF + 40 mV
V
VDD
V
–
V
VREF – 310 mV
V
–
V
VREF – 150 mV
V
–
V
0.7
V
1.53
V
–
mV
–20
mA
20
mA
85
°C
Parameter Description
Condition
VDD
Min. Typ.[9] Max. Unit
VIK
Clamp Voltage II = –18 mA
2.3V
–
–
–1.2 V
VOH
High level output IOH = –100 µA
voltage
IOH = –16 mA
2.3 to 2.7V VDD – 0.2 –
2.3V
1.95
–
–
V
–
V
VOL
Low level output IOL = 100 µA
voltage
IOL = 16 mA
2.3 to 2.7V
–
2.3
–
–
0.2 V
–
0.35 V
II
All Inputs
VI = VDD or VSS
2.7V
–
–
± 5 µA
IDD
Static Standby RESET# = VSS
IO = 0 2.7V
–
–
10 µA
Static Operating RESET# = VDD, VI = VIH(AC) or VIL(AC)
2.7
–
–
40.0 mA
Notes:
4. The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
5. Stresses greater than those listed under Absolute Maximum Conditions may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
6. VDD/VDDQ terminals.
7. All terminals except VDD.
8. The RESET# input of the device must be held at VDD or VSS to ensure proper device operation.
9. All typical values are measured at TAMB = 25°C
Rev 1.0, November 21, 2006
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