CY28401 Datasheet, PDF (10/13 Pages) Cypress Semiconductor – 100-MHz Differential Buffer for PCI Express and SATA

CY28401
Absolute Maximum Conditions
Parameter
Description
Condition
Min.
Max.
V_DD
V_{DD_A}
V_IN
T_S
T_A
T_J
Ø_JC
Ø_JA
ESD_HBM
UL-94
Core Supply Voltage
Analog Supply Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Relative to V _SS
Non-functional
Functional
Functional
Mil-Spec 883E Method 1012.1
JEDEC (JESD 51)
MIL-STD-883, Method 3015
At 1/8 in.
–0.5
–0.5
–0.5
–65
0
2000
4.6
4.6
V_DD + 0.5
+150
70
150
TBD
TBD
V–0
MSL
Moisture Sensitivity Level
1
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Unit
V
V
VDC
°C
°C
°C
°C/W
°C/W
V
DC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
VDD_A_,
VDD
3.3V Operating Voltage
3.3 ± 5%
3.135 3.465
V_ILI2C
V_IHI2C
V_IL
V_IH
V_OL
V_OH
I_IL
I_IH
I_OZ
C_IN
C_OUT
L_IN
I_DD3.3V
I_PD3.3V
I_PD3.3V
Input Low Voltage
SDATA, SCLK
–
1.0
Input High Voltage
SDATA, SCLK
2.2
–
3.3V Input Low Voltage
V_SS – 0.5 0.8
3.3V Input High Voltage
2.0 V_DD + 0.5
3.3V Output Low Voltage
I_OL = 1 mA
–
0.4
3.3V Output High Voltage
I_OH = –1 mA
2.4
–
Input Low Leakage Current
Except internal pull-up resistors, 0 < V_IN < V_DD –5
Input High Leakage Current
Except internal pull-down resistors, 0 < V_IN < V_DD
5
High-impedance Output Current
–10
10
Input Pin Capacitance
2
5
Output Pin Capacitance
3
6
Pin Inductance
–
7
Dynamic Supply Current
At max. load and 100 MHz
–
300
Power-down Supply Current PD asserted, Outputs driven
–
65
Power-down Supply Current PD asserted, Outputs Three-stated
–
5
AC Electrical Specifications
Unit
V
V
V
V
V
V
V
PA
PA
PA
pF
pF
nH
mA
mA
mA
Parameter
Description
Condition
Min.
DIF at 0.7V
T_DC
DIFT and DIFC Duty Cycle
Measured at crossing point V_OX
T_SKEW Any DIFT/C to DIFT/C Clock Skew, SSC Measured at crossing point V_OX
T_PERIOD Average Period
Measured at crossing point V_OX at 100 MHz
T_CCJ
DIFT/C Cycle to Cycle Jitter
Measured at crossing point V_OX
T_R / T_F DIFT and DIFC Rise and Fall Times Measured from V_OL = 0.175 to V_OH = 0.525V
T_RFM
Rise/Fall Matching
Determined as a fraction of 2*(T_R – T_F)/(T_R + T_F)
'T_R
Rise Time Variation
'T_F
Fall Time Variation
V_HIGH
Voltage High
Measured SE
45
–
9.9970
–
175
–
–
–
660
Max. Unit
55
%
200 ps
10.0533 ns
50
ps
700 ps
20
%
125 ps
125 ps
850 mv
Rev 1.0, November 21, 2006
Page 10 of 13