CY28435 Datasheet, PDF (1/22 Pages) Cypress Semiconductor – Clock Generator for Intel Grantsdale Chipset

PRELIMINARY
CY28435
Clock Generator for Intel^£Grantsdale Chipset
Features
• Compliant to Intel^£ CK410
• Supports Intel Prescott and Tejas CPU
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks
• 96 MHz differential dot clock
• 48 MHz USB clocks
• 33 MHz PCI clock
• Dynamic Frequency Control
Block Diagram
• Dial-A-Frequency^£
• Watchdog
• Two Independent Overclocking PLLs
• Low-voltage frequency select input
• I²C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 56-pin SSOP and TSSOP packages
CPU SRC
PCI
REF DOT96 USB
x2
x7
x9
x2
x1
x2
Pin Configuration
Xin
14.318MHz
Xout
Crystal
PLL Reference
FS_[E:A]
CPU
PLL
Divider
SRC
PLL
Divider
SDATA
PLL
Divider
VTTPWR_GD#/PD
DF_EN
DF[2:0]
SDATA
SCLK
FIX
PLL
Divider
Dynamic
Frequency
I2C
Logic
Watchdog
Timer
VDD_RE
F
RE
F
IREF
VDD_CPU
CPUT
CPUC
VDD_CPU
ITP_EN
VDD_SRC
SRCT
SRCC
VDD_SRC
VDD_SRC
SRCT4_SATA
SRCC4_SATA
VDD_48Mhz
DOT96T
DOT96C
VDD_48
USB
VDD_PCI
PCI
VDD_PCI
PCIF
SRESET#
VDD_PCI
1
VSS_PCI
2
DF2/PCI3 3
*FS_E/PCI4 4
PCI5 5
VSS_PCI 6
VDD_PCI
7
**DF_EN/PCIF0
8
**SRESET_EN/PCIF1
9
PCIF2 10
VDD_48 11
USB48_0
12
VSS_48
13
DOT96T
14
DOT96C
15
*FS_B/USB48_1
16
**VTTPWRGD#/PD
17
**FS_A
18
SRCT1
19
SRCC1
20
VDD_SRC
21
SRCT2
22
SRCC2
23
SRCT3
24
SRCC3
25
SRCT4_SATA
26
SRCC4_SATA
27
VDD_SRC
28
56
PCI2/DF1
55 PCI1/DF0
54 PCI0/SRESET#
53 REF1/**FS_C
52 REF0/**FS_D
51 VSS_REF
50 XIN
49 XOUT
48 VDD_REF
47 SDATA
46 SCLK
45 VSS_CPU
44 CPUT0
43 CPUC0
42 VDD_CPU
41 CPUT1
40 CPUC1
39 IREF
38 VSSA
37 VDDA
36 SRCT7
35 SRCC7
34 VDD_SRC
33 SRCT6
32 SRCC6
31 SRCT5
30 SRCC5
29 VSS_SRC
* indicates internal pull-up
** indicates internal pull-down
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:[phone] Fax:[phone]
Page 1 of 22
www.SpectraLinear.com