CY28158 Datasheet, PDF (1/9 Pages) Cypress Semiconductor – Spread Spectrum Timing Solution for Serverworks Chipset

PRELIMINARY
CY28158
Spread Spectrum Timing Solution for Serverworks Chipset
Features
• Maximized EMI suppression using Cypress’s spread
spectrum technology
• Based on Industry Standard CK133 Pinout with all
outputs compliant to CK98 specifications
• 0.5% downspread outputs deliver up to 10dB lower EMI
• 6 skew-controlled copies of CPU output
• 6 copies of PCI output (synchronous w/CPU output)
• 2 copies of 66 MHz fixed frequency 3.3V clock
• 3 copies of 16.67 MHz IOAPIC clock, synchronous to
CPU clock
• 1 copy of 48 MHz USB output
• 2 copies of 14.31818 MHz reference clock
• Programmable to 133 or 100 MHz operation
• Power management control pins for clock stop and
shut down
• Available in 56-pin SSOP
Key Specifications
Supply Voltages: ......................................V_DD33 = 3.3V ± 5%
.................................................................V_DD25 = 2.5V ± 5%
CPU Output Jitter: ................................................... .<150 ps
CPU Output Skew:.................................................... <175 ps
CPU to 3V66 Output Offset:
0.0 to1.5 ns (CPU leads)
CPU to IOAPIC Output Offset 1.5 to 4.0 ns (CPU leads)
CPU to PCI Output Offset ................. 0 to 4.0 ns (CPU leads)
Table 1. Pin Selectable Frequency
SEL133/100#
CPU0:5 (MHz)
PCI
1
133
33.3
0
100
33.3
Block Diagram
X1
X2
CPU_STOP#
XTAL
OSC
2
REF0:1
STOP
Clock
Logic
6
CPU0:5
SPREAD#
SEL0
SEL1
SEL133/100#
PWRDWN#
PCI_STOP#
PLL 1
Power
Down
Logic
÷2/÷1.5
STOP
Clock
Logic
STOP
÷2
Clock
Logic
÷2
2
3V66_0:1
1
PCI_F
5
PCI1:5
3
IOAPIC0:2
Tristate
Logic
PLL2
1
48MHz
Pin Configuration
GND_REF 1
REF0 2
REF1 3
VDD_REF 4
X1 5
X2 6
GND_PCI 7
GND_PCI 8
PCI_F 9
VDD_PCI 10
PCI1 11
PCI2 12
GND_PCI 13
PCI3 14
PCI4 15
VDD_PCI 16
VDD_PCI 17
PCI5 18
GND_PCI 19
GND_3V66 20
GND_3V66 21
VDD_3V66 22
VDD_3V66 23
GND_3V66 24
3V66_0 25
3V66_1 ²⁶
VDD_3V66 ²⁷
SEL133/100# 28
56 VDD_IOAPIC
55 IOAPIC2
54 IOAPIC1
53 IOAPIC0
52 GND_IOAPIC
51 VDD_CPU
50 CPU5
49 CPU4
48 GND_CPU
47 VDD_CPU
46 CPU3
45 CPU2
44 GND_CPU
43 VDD_CPU
42 CPU1
41 CPU0
40 GND_CPU
39 VDDA
38 GNDA
37 PCI_STOP#
36 CPU_STOP#
35 PWR_DWN#
34 SPREAD#
33 SEL1
32 SEL0
31 VDD_48MHZ
30 48MHZ
29 GND_48MHZ
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:[phone] Fax:[phone]
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