MB9B320M Datasheet, PDF (85/113 Pages) SPANSION – This document states the current technical specifications regarding

DataSheet
5. 12-bit A/D Converter
 Electrical characteristics for the A/D converter
(V_CC = AV_CC = 2.7V to 5.5V, V_SS = AV_SS = AVRL = 0V, T_A = - 40°C to + 105°C)
Parameter
Symbol
Pin
name
Min
Value
Typ
Max
Unit
Remarks
Resolution
-
-
-
-
12
bit
Integral Nonlinearity
Differential Nonlinearity
Zero transition voltage
Full-scale transition
voltage
Conversion time
Sampling time*²
Compare clock cycle*³
State transition time to
operation permission
-
-
V_ZT
V_FST
-
-
ANxx
ANxx
-
± 1.5
± 4.5 LSB
-
-
± 1.7
± 10
± 2.5
± 15
LSB
mV
AVRH = 2.7 V
to 5.5 V
- AVRH ± 5 AVRH ± 15 mV
-
-
0.8*¹
1.0*¹
-
-
0.24
-
t_S
-
0.3
-
40
-
t_CCK
-
50
-
-
-
10
1000
μs ^{AVCC ≥ 4.5 V}
AV_CC < 4.5 V
μs ^{AVCC ≥ 4.5 V}
AV_CC < 4.5 V
ns ^{AVCC ≥ 4.5 V}
AV_CC < 4.5 V
t_STT
-
-
-
1.0
μs
Analog input capacity
C_AIN
-
-
-
9.7
pF
Analog input resistor
R_AIN
-
-
-
1.7
2.4
kΩ
AV_CC ≥ 4.5 V
AV_CC < 4.5 V
Interchannel disparity
-
-
-
-
4
LSB
Analog port input current
-
ANxx
-
-
5
μA
Analog input voltage
-
ANxx AVSS
-
AVRH
V
Reference voltage
-
AVRH 2.7
-
-
AVRL AV_SS
-
AV_CC
V
AV_SS
V
*1: The conversion time is the value of sampling time (t_S) + compare time (t_C).
The condition of the minimum conversion time is the following.
AV_CC ≥ 4.5 V, HCLK=50 MHz sampling time: 240 ns, compare time: 560 ns.
AV_CC < 4.5 V, HCLK=40 MHz sampling time: 300 ns, compare time: 700 ns
Ensure that it satisfies the value of the sampling time (t_S) and compare clock cycle (t_CCK).
For setting of the sampling time and compare clock cycle, see "Chapter 1-1: A/D Converter" in "FM3 Family
PERIPHERAL MANUAL Analog Macro Part".
The register settings of the A/D Converter are reflected in the operation according to the APB bus clock
timing.
For the number of the APB bus to which the A/D Converter is connected, see "Block Diagram".
The base clock (HCLK) is used to generate the sampling time and the compare clock cycle.
*2: A necessary sampling time changes by external impedance.
Ensure that it sets the sampling time to satisfy (Equation 1).
*3: The compare time (t_C) is the value of (Equation 2).
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MB9B320M_DS706-00049-3v0-E, March 18, 2015