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AM42BDS6408H Datasheet, PDF (79/90 Pages) SPANSION – CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory, and 8 Mbit (512 K x 16-Bit) SRAM
ADVANCE INFORMATION
AC CHARACTERISTICS
Address boundary occurs every 64 words, beginning at address
00003Fh: (00007Fh, 0000BFh, etc.) Address 000000h is also a boundary crossing.
CLK
Address (hex)
C60
C61
3C
3D
AVD# (stays high)
RDY(1)
RDY(2)
C62 C63
C63
C63
C64
3E
3F
3F
3F
40
tRACC
latency
tRACC
tRACC
latency
tRACC
Data
D60
D61
D62
D63
Invalid
Read Status
OE#,
CE#
(stays low)
Notes:
1. RDY active with data (A18 = 0 in the Configuration Register).
2. RDY active one clock cycle before data (A18 = 1 in the Configuration Register).
3. Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60. Figure shows the device crossing a
bank in the process of performing an erase or program.
Figure 44. Latency with Boundary Crossing
into Program/Erase Bank
October 23, 2003
Am42BDS6408H
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